• ��(n��i)��(Core)

- Cortex-M0 32λ΢̎����
- �����l�ʿ��_ 50 MHz
- ����늉���2.5V to 5.5V
- �����ضȣ�-40�� ~ 85��

• ��(n��i)��(Memory)

- 64 KB��(y��ng)��
- ��(n��i)Ƕ4 KB SRAM
- ��(n��i)Ƕ4 KB Data Flash
- �ھ�ϵ�y(t��ng)����ISP
(In-System Programming)
- �ھ��·����ICP
(In-Circuit Programming)
- �ھ���(y��ng)�ó������ IAP
(In-Application Programming)

• ģ�M�D(zhu��n)��(sh��)���D(zhu��n)�Q��(ADC)

- �ṩ8ͨ��
- 12λ�ֱ���
- ÿ��ɘ��ʿ��_ 800 kSPS
- PWMݔ�������|�l(f��)A/D�D(zhu��n)�Q
- �ṩ�`���1��ضȂ�����

• �}�������{(di��o)׃(PWM)

- ���8ͨ��PWMݔ�����aʽPWMݔ��
- PWM�r�g�c���ڿ��|�l(f��)A/D�D(zhu��n)�Q

• ͨӍ�ӿ�(Connectivity)

- �ṩ���MSPI
- �ṩ���MI2C
- �ṩ���MUART
- �ṩһ�M16/8λ��U�ӿ�(EBI)

• �r犿���(Clock control)

- �ⲿ����4 to 24MHz
- ��(n��i)��22.1184 MHz �߾���RC����
����5V�¡�1%�`��